In this “Power Design Tips, we’ll look at a simple circuit that converts a high AC input Voltage to a low DC voltage that can be used in applications such as Electronic energy meters. In this particular application, there is no need to isolate the output voltage from the input voltage. Here, the rectified AC input voltage can be as high as 375 VDC, while the output voltage can be within 5 volts at hundreds of milliamps. These high-volume applications are often driven by cost and therefore require low part count/low cost circuits. Step-down regulators offer a low-cost solution, but are challenging to implement with high-voltage inputs. In continuous mode, the duty cycle of this buck regulator is the output voltage divided by the input voltage, ie 1.25% duty cycle when switching from 400V to 5V. If we were to run the power supply at 100 kHz, an on-time of 125 nS would be required, which is often impractical due to switching rate limitations.
picture1 low voltage step downIC Enables simple, economical bias supply
picture1 Shows a circuit that solves the duty cycle problem. A constant conduction controller (U1) drives a high voltage buck power stage that includes a P-channel FET (Q4) driven by a level shifter circuit (Q2, Q3) to convert 400V to 5V. This controller (using the TPS64203 in our example) is the key to this design. It has a low quiescent current of 35 uA), allowing the converter to start up offline with minimal R2 and R3 resistor power dissipation. The second key factor is its ability to provide short (600 nS) turn-on gate drive pulses to raise the minimum switching frequency (in continuous conduction mode) above 20 kHz. Q1 is used to level shift the gate drive voltage to the high side driver. The low voltage output from the IC is about 5 volts on R4, which causes a fixed current to appear in Q1 and R5. Supply voltage to R5 through the emitter follower to the gate of the P-channel FET. The current also charges C4 to power the driver circuit. We chose a P-channel FET to simplify the drive circuit. If an N-channel were to be used, then a way to drive the FET gate above the input voltage would be required to fully enhance the device.
picture2 MOSFETsshow better(< 50nS) switching speed
picture2 Two circuit waveforms are shown, which show that better switching speeds can be obtained with a simple bipolar driver. Gate drive rise and fall times of less than 50 nS result in drain-to-switch times of less than 30 nS. The rate can be increased by adjusting the drive current switched to the P-channel FET, at the expense of higher power dissipation. The efficiency of this circuit is about 70%. Considering the power consumption level is only 4 watts, converting from 400V to 5V, and the circuit is simple and cheap, this efficiency is not low. Two drawbacks of this design are the lack of short circuit and overvoltage protection. However, this circuit may represent a cost-effective compromise in many applications.
Stay tuned next time we discuss a way to measure the phase margin of a power supply control loop without having to study its internals.
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