“After long-term development, the technology of high-Voltage gate driver IC has moved towards silicon-on-insulator (SOI). SOI refers to the formation of a thin layer of monocrystalline silicon on the insulating substrate of silicon. The conductive type of silicon substrate, it has a three-layer structure, the first layer is a thick silicon substrate layer to provide mechanical support, the second layer is a thin silicon dioxide layer, silicon dioxide is an insulator, thus forming One layer of insulating structure, the third layer is a thin top layer of single crystal silicon, and the circuit is etched on this layer to form the working layer of the driver IC.
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Author: Shen Song Li Qingxia
In the previous technical article, an overview of the driver chip and PN junction isolation (JI) technology were introduced. This article will continue to introduce Infineon’s silicon-on-insulator (SOI) driver chip technology.
After long-term development, the technology of high-voltage gate driver IC has moved towards silicon-on-insulator (SOI). SOI refers to the formation of a thin layer of monocrystalline silicon on the insulating substrate of silicon. The conductive type of silicon substrate, it has a three-layer structure, the first layer is a thick silicon substrate layer to provide mechanical support, the second layer is a thin silicon dioxide layer, silicon dioxide is an insulator, thus forming One layer of insulating structure, the third layer is a thin top layer of single crystal silicon, and the circuit is etched on this layer to form the working layer of the driver IC.
Figure 1. Comparison of silicon-on-insulator SOI (left) and traditional bulk silicon (Bulk CMOS) (right) structures
SOI was proposed by CW Miller and PH Robinson in 1964, and gradually matured after decades of development. Infineon adopts SOI’s uniquely designed gate driver IC, which brings many advantages from the design. Among them, the biggest advantage is that the insulating layer of silicon dioxide of SOI can completely eliminate the parasitic PN junction in the substrate in the bulk silicon (Bulk CMOS) structure, thereby eliminating the latch-up effect and improving the negative pressure resistance of the driver chip. ability.
Figure 2. Comparison of traditional bulk silicon (Bulk CMOS) (left) and silicon-on-insulator SOI (right) parasitic PN junctions
From the design structure of the gate driver IC, as shown in Figure 3, the influence of related circuits can be clearly seen. In the design of bulk silicon (Bulk CMOS), for high-side circuits, the substrate is connected to the COM potential, and the MOS The source SOURCE is connected to the VS potential, because there is a parasitic diode between the substrate and VS, so under certain conditions, when the potential of COM is higher than the potential of VS, the parasitic diode will be turned on, resulting in an uncontrollable current, This affects the reliability of the circuit. In the silicon-on-insulator SOI driver IC, the presence of the silicon dioxide insulating layer eliminates the parasitic diode connecting COM and VS, thereby greatly improving the reliability of the driver IC.
Figure 3. The impact of parasitic PN junctions on traditional bulk silicon (Bulk CMOS) (left) and silicon-on-insulator SOI (right) designs
The ability of the driver chip to withstand negative voltage (the voltage of VS is lower than COM) is very important for motor drive applications, or for bridge circuits with inductive loads. As shown in Figure 4, when the upper tube Q2 is turned off, the load current is switched to the lower tube D1, and the current flows from the negative bus to the load at this time. Considering the dynamic situation, in the process of gradually establishing the current on D1, between VS~COM, the voltage induced by Ls1 and Ld1, as well as the conduction voltage of the diode of Q1, will be generated. The total voltage is equal to these three The superposition of the voltage, the voltage in the direction is positive in COM and negative in VS. Because the negative pressure phenomenon is unavoidable in such applications, the higher the ability of the driver IC to withstand this negative pressure, the better. As can be seen from the right picture of Figure 4, Infineon’s SOI driver IC can withstand negative pressure. Reaching -100V/300ns or -60V/1000ns, the ability to resist negative pressure is far greater than the driver IC designed by JI.
Figure 4. Generation of negative pressure in bridge circuit and negative pressure tolerance working area of Infineon’s SOI drive
In addition, in the structure of SOI, due to the disappearance of the parasitic PN junction, the parasitic effect of the device is reduced, the switching loss of the device can also be greatly reduced, and the static power consumption can also be reduced due to the reduction of the leakage current, so that the The driver IC designed with SOI can operate at a higher frequency and reduce the overall loss. Figure 5 compares the temperature rise of 2ED2106 (SOI design) and IR2106 (Bulk CMOS design) at a switching frequency of 300kHz. It can be seen that the maximum temperature of 2ED2106 is only 66°C, while the temperature of IR2106 is as high as 122°C.
Figure 5. Comparison of temperature rise of silicon-on-insulator SOI and traditional bulk silicon (Bulk CMOS) driver ICs
Thirdly, SOI is more convenient for integration because of good dielectric isolation. Infineon’s SOI driver IC integrates a bootstrap diode, which can save the high-voltage bootstrap diode that was previously required, thereby saving system costs.
Figure 6. Schematic of a silicon-on-insulator SOI integrated bootstrap diode
In summary, silicon-on-insulator SOI is a technological leap for gate drivers, with a series of excellent features such as strong negative pressure tolerance, low losses, and integrated bootstrap diodes.
Infineon has launched a large number of silicon-on-insulator SOI driver ICs with voltages ranging from 200V to 1200V. The structures include high- and low-side drivers, half bridges and three-phase bridges.
Click to query related models: https://www.infineon.com/cms/en/product/power/gate-driver-ics/
The Links: NL10260BC19-01D HDM3224-1-9J1F PM800HSA120
