“Mixed signal oscilloscopes (MSOs) become everyone’s “engineering” swiss army knife, why would anyone need an extra logic analyzer? Now, MSOs with sampling rates in the GHz range and 8 or more digital lines are priced well under $3,000, and some are even under $1,000. As a result, many in the electronics industry have announced the elimination of logic analyzers as a standalone device.
Mixed signal oscilloscopes (MSOs) become everyone’s “engineering” swiss army knife, why would anyone need an extra logic analyzer? Now, MSOs with sampling rates in the GHz range and 8 or more digital lines are priced well under $3,000, and some are even under $1,000. As a result, many in the electronics industry have announced the elimination of logic analyzers as a standalone device.
It’s no surprise that mixed-signal oscilloscopes can be found in most electrical engineering labs these days. They are versatile, affordable, and have become an essential tool for any engineer testing, debugging, or validating Electronic systems. In fact, this is probably the only instrument most electronics engineers will have to use, or maybe 90% of their lab time. Therefore, it is wise to spend a portion of the initial engineering or test lab budget on the MSO. But does this mean that a logic analyzer (LA) is no longer needed?
Oscilloscopes and Logic Analyzers
Digital oscilloscopes and logic analyzers are based on sampling techniques. Measurements of a signal (usually a Voltage) are converted to digital values by a high-speed analog-to-digital converter (ADC) and stored in memory at regular intervals defined by the instrument’s sampling clock.
Think of a logic analyzer as an oscilloscope with 1-bit vertical resolution on all channels. It displays the signal as a logical (binary) value based on whether the measured voltage is above or below a conventional voltage level called a “threshold”. This is the first fundamental difference between an oscilloscope and a logic analyzer.
Another fundamental difference between an oscilloscope and a logic analyzer is how sampled values are displayed. In its most common mode of operation, an oscilloscope is essentially a device that repeatedly captures a window of events of a given length (defined by its total memory) and refreshes a portion of its Display on the screen. Many oscilloscopes simulate “persistence” by overlaying multiple captured windows on the Display and modulating screen pixel intensity.
Logic analyzers are primarily used for single captures (continuous captures without stacking) and to analyze event sequences that sometimes exceed 100 digital signals before and after a trigger event.
The advent of microcontroller-based systems required the creation of tools such as logic analyzers. First, the digital bus needs to be viewed, so two or more channels are required. Second, it is necessary to see how the logic circuit works in the form of binary values, i.e. the signal that is seen at the sampling event of the circuit. Over time, logic analyzers have evolved into “pure” instruments capable of performing analog measurements such as checking threshold levels, detecting glitches, and verifying that signals conform to specific input and output standards.
It is common to hear that the real-time display capability is the main difference between an oscilloscope and a logic analyzer. In fact, automatic display refreshes can confuse users into thinking they’ll see data as it appears. However, the oscilloscope display does not refresh as fast as the eye really sees. In most cases, a logic analyzer (LA) is used by first capturing the data and then analyzing it. The logic analyzer’s repeat trigger feature also refreshes the display based on recurring trigger events. It’s true that data is displayed and presented differently in a digital oscilloscope and an LA, but fundamentally both tools operate by sampling the signal and storing the samples into memory.
MSO = Oscilloscope + Logic Analyzer?
Well, mostly. Mixed signal oscilloscopes have analog channels (usually 2 to 4) and digital channels (usually 8 to 16). On both types of channels, data is sampled at the MSO’s maximum sampling rate (typically 1GHz). The sampling clock is usually generated internally by the MSO. In other words, the reference time base used for sampling is independent of the data. This is called “timing analysis”. Of course, for digital channels, the logic analyzer’s vertical signal resolution is reduced to 1 bit.
The MSO is capable of performing certain functions traditionally reserved for the LA: C timing analysis of digital signals. C is capable of viewing 2 or 4 more channels; on modern MSOs, 16 digital inputs are available. C Digital Signal Integrity Check.
In this regard, being able to visualize an analog extension of a digital signal and its digital version on the same screen is definitely an improvement over using an oscilloscope and logic analyzer separately. As electronic systems move toward more complexity, debugging often involves finding a mixture of analog and logic problems. Triggering of the MSO can be defined by any kind of signal. Repeating (oscilloscope-like) or single-shot (logic analyzer-like) display types are also available. However, displaying analog and digital records on the same screen with time-related data is one of MSO’s greatest strengths.
When you think you need a logic analyzer, consider the following:
1. Logic analyzers have more digital channels than MSOs.
Traditional benchtop logic analyzers can count up to 128 digital channels. On an MSO, there are usually up to 16 channels. A large number of Los Angeles users, Application Specific Integrated Circuit (ASIC) and Field Programmable Gate Array (FPGA) design engineers typically require 32 to 64 signals or more to decode bus transactions or visualize FPGA internals. But, 80 to 90 percent of the time, 16 digital channels is enough, even if you’re involved in IC design. The rare 1% to 10% case where you want to see 100 parallel digital signals may not be enough to justify an investment in a high-end 100-channel logic analyzer that can cost over $20,000.
FPGA design is an area where large channel count logic analyzers were once used as basic equipment for debugging. Adding a connector to the board and watching the chip through its input-output, or even putting a debug connector in the chip-to-chip interconnect, can be very useful for solving design problems. However, due to their programmable nature, FPGAs allow monitoring of many internal nodes by simply routing them to the inputs and outputs connected to the LA.
Things have changed; the FPGA world is getting so advanced that even if you can see 100 in parallel, it no longer makes sense to watch the chip’s behavior through external digital inputs and outputs. Today, with FPGAs potentially running at over 300 MHz internally, placing a 100-pin high-speed parallel connector on the board introduces too many board-level constraints (noise, layer count, crosstalk, etc.). Also, on-chip I/O buffers sometimes don’t run at the same speed as the chip’s internals. Other methods, such as using embedded logic analyzers or software-based debugging, have now become more efficient and cost-effective.
The “digital channel advantage” of a logic analyzer over an MSO must be carefully considered. For most engineers, 16 to 32 digital lines are sufficient. In situations where you absolutely need to see more digital signals in parallel, a logic analyzer with 68 to 100 or even more channels will make a difference. However, this must be carefully balanced against the constraints of adding the required debug connectors to the system. With digital complexity moving inside the chip, it is increasingly difficult to detect high frequency signals without creating signal or data integrity issues. So it may be worth investing less than $20,000 typically in a logic analyzer with a large number of channels.
2. The memory of the logic analyzer is larger than that of the MSO.
Although there may be exceptions due to the continued evolution of MSO devices, a potential advantage of a logic analyzer is that it can justify adding it to an existing MSO setup as it helps to see longer before and after trigger events time limit. During debugging, it is valuable to see that the digital system takes longer to execute. It has the potential to speed up the understanding of why errors occurred, thereby speeding up error correction. It pays for itself very quickly! The larger total available memory size in a logic analyzer, in addition to the MSO, adds a lot of value. Mass storage means more of the observed signal history can be seen.
3. Logic analyzers allow more complex triggering or data filtering than MSOs.
The total amount of memory available is not the only parameter to consider. How the instrument uses memory to store data is equally important. How much signal history can be observed? How useful is this information in debugging the system under test? Consider how logic analyzers and MSOs select data.
Most MSOs are capable of triggering on simple events such as voltage levels or digital values, or transitioning on specific digital lines. If they also provide simple serial bus decoding (such as I²C or SPI), MSOs can also be used to take advantage of serial triggering, i.e. stop capturing when a predefined serial value occurs on a digital line.
On the other hand, all logic analyzers can trigger on parallel values. They were also able to build complex sequences of conditions to ultimately trigger data capture. Many digital system buses are quiet most of the time. A basic logic analyzer, even with full memory, has the potential to waste sampling resources even when nothing happens. To fully utilize the logic analyzer’s memory, several strategies can be used in combination. Therefore, some logic analyzers only store data transformations, potentially compressing the collected data. This is a somewhat uncontrolled way of memory and is highly dependent on the data itself. Another economical storage strategy is to use logic equations on the recorded data to define the conditions under which the logic analyzer should store the data or when it can discard the data.
Data qualification or data filtering is the ability of a logic analyzer to log only data that meets user-defined criteria. In this context, logic analyzers are also known as digital data loggers. The strategy is based on prior knowledge of the debugged digital system. You can simply detect the signal level (eg, output enable) and record the value of the bus when you see that level. Or it could be much more complicated, like filtering when some digital line’s boolean equation is true, or even logging a predefined amount of data when a trigger condition is encountered.
The total memory available is important, but efficient data storage, data identification, and rich triggering options add enormous value to different logic analyzer products. Seeing the relevant data is more important than seeing all the data. A logic analyzer (sometimes called a data logger) capable of data qualification or data filtering is an excellent aid to an MSO.
4. The logic analyzer looks at the signal as hardware.
Unlike most MSOs, the logic analyzer can use the reference sampling clock signal of the system under test. This means viewing the sampled signal in sync with your hardware. This mode is called “state analysis” as opposed to “timing analysis”, where the sampling clock is generated by the device itself. Running a device in state analysis mode can be a challenge because a clean reference clock signal from the system under test may not always be available. However, state analysis will provide insight into the system’s embedded software, allowing you to focus on what the hardware sees and speed up debugging.
Mixed-signal oscilloscopes are ideal for most basic and advanced test and debugging tasks on a variety of electronic systems. Therefore, investment in additional external logic analyzers must be carefully considered. Choosing a logic analyzer just because it has 100 channels may not be worthwhile, as alternative and more cost-effective debugging strategies exist.
But a logic analyzer with millions of sample memory, state analysis capabilities, and data qualification will add value to any common MSO. Choosing a logic analyzer with these features allows you to view the system like a circuit and save data over a longer time frame. This logic analyzer is an ideal companion to a traditional MSO as it provides complementary analysis that can speed up debugging tasks and make any engineer more efficient when debugging complex digital problems, not only adding value to the MSO, but also for Your value-added service employment!