Analog Devices’ ezLINX iCoupler isolation interface development platform uses the ADSP-BF54x Blackfin family of processors to evaluate eight physical-layer digital isolation communication standards (USB, RS-422, RS-485, RS-232, CAN, SPI, I2C and LVDS). Since the Blackfin ADSP-BF548 processor runs on the uCLinux operating system, it is easy to personalize through open source hardware and software platforms, greatly reducing development time. Interfaces on the ezLINX The ezLINX uses ADI’s isolated transceivers.
The ADSP-BF54X Blackfin processor is a member of the Blackfin family, which combines Analog Devices/Intel’s Micro Signal Architecture (MSA). Blackfin processors combine the dual MAC’s state-of-the-art signal processing engine with the advantages of a neat, orthogonal, RISC-like microprocessor instruction set, and single instruction multiple data (SIMD) multimedia into a single instruction set architecture .
Figure 1 ADSP-BF549 functional block diagram
Blackfin processors feature world-class power management and performance. The design of the Blackfin processor adopts a low-power and low-Voltage approach for on-chip dynamic power management, which can diversify operating voltages and frequencies, significantly reducing overall power consumption. Lowering the voltage and frequency can drastically reduce power consumption compared to lowering the frequency only, which means longer battery life.
The ADSP-BF54X Blackfin processor is a highly integrated system-on-chip, a solution for next-generation embedded networking applications. Through the combination of industry-standard interfaces and high-performance signal processing cores, users can rapidly develop cost-effective solutions without the need for expensive external components. System peripherals include, a high-speed USB OTG (in progress) controller, integrated PHY, CAN 2.0B controller, TWI controller, UART port, SPI port, serial port (SPORT), ATAPI controller, SD/SDIO control controller, a real-time clock, a watchdog timer, LCD controller and multiple enhanced parallel peripheral interfaces.
Via a variety of high-bandwidth buses, the ADSP-BF54x processors contain a rich set of peripherals connected to the core, providing flexible system configuration and excellent overall system performance. Its general-purpose peripherals include UART, SPI, TWI, pulse-width modulation (PWM), and pulse-measurement capable timers, general-purpose I/O pins, a real-time clock, a watchdog timer, and other functions. This set of functions addresses a wide variety of typical system support needs and is enhanced by the system’s scalability. ADSPBF54x processors include dedicated network communication modules and high-speed serial and parallel ports, interrupt controllers (for on-chip peripherals or external sources, flexible interrupt management), power management control functions (for processor and system various features).
All peripherals (except general purpose I/O, CAN, TWI, real-time clock and timers) are supported by a flexible DMA structure. There are also separate memory DMA channels dedicated to data transfers between different memory spaces of the processor, including external DDR (standard or mobile, depending on the device) and asynchronous memory.
Multiple on-chip buses, with a maximum operating frequency of 133MHz, provide enough bandwidth to ensure the operation of the processor core and all on-chip peripherals. The ADSP-BF54X Blackfin processor includes an on-chip voltage regulator to support dynamic power management functions. The voltage regulator provides a range of core voltages for VDDEXT. The voltage regulator can be freely chosen by the user.
ADSP-BF54x main features
• Up to 600MHz high performance Blackfin processor
– 2 16-bit MACs, 2 40-bit ALUs, 4 8-bit video ALUs
– RISC-like register and instruction model
– Wide range of operating voltages and flexible boot options
– Programmable on-chip voltage regulator
– 400-ball CSP_BGA, RoHS compliant package
– Up to 324k bytes of on-chip memory including SRAM/cache, dedicated instruction SRAM, data SRAM/cache, dedicated data SRAM, SRAM scratchpad
– External synchronous memory controller supporting DDR, SDRAM or mobile DDR SDRAM
– External asynchronous memory controller supporting 8-bit and 16-bit asynchronous memory and strobe devices
– NAND flash controller
– 4 memory-to-memory DMA pairs, 2 external requests
– Memory management unit provides memory protection
– Code-safe Lockbox security technology and 128-bit AES/ARC4 data encryption
– One Time Programmable (OTP) memory
– Hi-Speed USB (OTG), integrated PHY
– SD/SDIO controller
– ATA/ATAPI-6 controller
– Up to 4 Synchronous Serial Ports (SPORTs)
– Up to 3 serial peripheral interfaces (SPI compatible)
– Up to 4 Universal Asynchronous Transceivers (UARTs) with automatic H/W flow control
– Up to 2 Controller Area Network (CAN) 2.0B interfaces
– Up to 2 TWI (TWI) controllers
– 8 or 16-bit asynchronous host DMA interface
– Multiple Enhanced Parallel Peripheral Interfaces (EPPIs) supporting ITU-R BT.656 video format and 18-/24-bit LCD connectivity
– Media Transceiver (MXVR) for connecting to MOST network
– Pixel synthesizer for overriding alpha blending, color conversion
– Up to 11 32-bit timers/counters with PWM support
– Real Time Clock (RTC) and Watchdog Timer
– Up/down counter and rotary encoder support
– Up to 152 general purpose I/O ports (GPIO)
– On-chip PLL capable of frequency multiplication
– Debug/JTAG interface
Figure 2 Blackfin processor core block diagram
Figure 3 Block diagram of ezLINX iCoupler insulation interface development platform
ezLINX iCoupler Insulation Interface Development Platform
The ezLINX iCoupler Isolated Interface Development Environment provides developers with a cost-effective plug-and-play way to evaluate 8 physical layer, digitally isolated communication standards, (USB, RS-422, RS-485, RS-232, CAN, SPI, I2C LVDS). The Blackfin ADSP-BF548 processor is used to run the μCLinux operating system, and it is more convenient for users to customize through the open source hardware and software platform. Significantly reduces development time for embedded designers and system architects. The ezLINX interface utilizes ADI’s isolated transceivers and integrated iCoupler, as well as isoPower digital isolator technology.
The hardware ezLINX iCoupler isolated interface development environment consists of an ADSP-BF548 Blackfin processor with 64MB of RAM and 32MB of flash memory. Using ADI’s isolated transceiver and integrated iCoupler and isoPower technology, the communication standard of the isolated physical layer is realized. Routing between various communication standards is implemented at the hardware level.
The ezLINX iCoupler Insulation Interface Development Platform includes:
• Isolated USB with ADuM3160
• Isolated CAN, using the ADM3053 signal and power isolated CAN transceiver
• Isolated RS-485/RS-422, RS-485/RS-422 transceiver with ADM2587E signal and power isolation
• Isolated RS-232, using the ADM3252E signal and power isolated RS-232 transceiver
• Isolated I2C, using the ADuM1250 and ADuM5000
• Isolated SPI using ADuM3401, ADuM3402 and ADuM5000
• Isolated LVDS using ADuM3442, ADuM5000, ADN4663 and ADN4664
The ezLINX development platform also includes the following:
• Expansion connector for Hirose FX8120P-SV (91) for daughter board connection.
• RS-232 DB-9 console connector
• 1.2V, 2.5V, 3.3V, 5V regulated output voltage
• ADSP-BF548 isolated transceiver EvalBoard