Loop control is an important part of switching power supply design. The first two parts of the article discuss the types of converters operating at a fixed switching frequency, obtaining the dynamic response of the power stage, and choosing the crossover frequency and phase margin, respectively. This article will mainly discuss design examples related to switching power supplies.

Loop control is an important part of switching power supply design. The first two parts of the article discuss the types of converters operating at a fixed switching frequency, obtaining the dynamic response of the power stage, and choosing the crossover frequency and phase margin, respectively. This article will mainly discuss design examples related to switching power supplies.

IV Design Example: Stabilized AC/DC Flyback

I have chosen an AC/DC adapter project to illustrate how to apply the above line. We want a stable converter that provides 2.8 A through the 19.5 V output, and its schematic is shown in Figure 19.

It is powered by a rectified power supply through a diode bridge and bulk capacitors. Considering the use of a sine wave input, the rectified DC Voltage feeding the flyback converter is expected to be a sine wave in Figure 20. You can see that the voltage on the lowest input line (90 V) peaks at about 120V, but dips down to 52V. The converter must provide full power at this minimum input condition, otherwise overload protection may trip, or unacceptable ripple may appear in the output.

First, we need the control-to-output transfer function at the lowest input level. We can obtain this function using SIMPLIS described in Figure 21. Without any slope compensation, we expect the response to peak at half the switching frequency considering the heavy CCM operation required at 52V input.

Since SIMPLIS needs to find the Period Operating Point (POP) before starting the AC analysis, I had to add some slope compensation to get it to converge properly. This additional ramp can be generated by a low impedance drive pin using an RC network. If the time constant of this network is larger than the switching period, the obtained ramp is very linear and very suitable for compensation purposes. Figure 22 shows the results by cycle and the AC results.

Calculations show that the Q-factor of the double pole is negative, which indicates that the position is in the right half-plane: it is not surprising that the switching mode is very unstable. To choose the crossover frequency, we need to know the location of the right half-plane zero. You can’t get much bandwidth with such a low input voltage:

Among them, N is N in the transformer turns ratio 1:N, D is the duty cycle of the work, Lp is the primary inductance of the transformer, and Rload is the load resistance.

If we limit ourselves to 30% of that number, 500 Hz fc seems reasonable. For better values, you can choose to add bulk capacitors and increase the valley voltage to 70V, or reduce the primary inductance Lp. You can push the RHPZ higher, but as the ripple becomes larger, the conduction losses also increase. According to data extracted from the power stage Bode plot at 500 Hz, the attenuation is 4.4 dB and the phase lag is 86°. We can determine that to achieve a phase margin of 70°, the required phase margin boost (to correct for phase lag, and achieve some phase margin) is as follows:

The k-factor is ideal for stabilizing current-mode power supplies, and we can determine where to place the poles and zeros of the Type 2 compensator. First, determine the k value:

Therefore, the zero point will be at:

And the pole will be at:

For the 4.4 dB attenuation at 500 Hz, the gain we want to compensate depends on the LED series resistance[2]and optocoupler current transfer ratio (CTR):

Given the values ​​we obtained, we can conclude that the resistance is 3.6 kΩ. You must confirm that this resistor is compatible with the bias conditions required to pull the controller feedback pin low in the worst case. Finally, the location of the high frequency pole fp is determined by adjusting the capacitance on the optocoupler.Note that we must properly characterize this optocoupler to know the location of its low frequency pole[2]. With all components selected, we can individually test the TL431-based compensator as shown in Figure 23.

After this step, you can use the SIMPLIS template in Figure 21 to check the crossover frequency for various input voltage conditions. As shown in Figure 24, the phase margin obtained at the input voltage extremes is very good. Immediately after the input voltage is increased to 120 V, the crossover screen expands to about 1 kHz, which is good for the response speed.

Once the compensation is applied, the output transient load step is performed and you can perform a response check, as shown in Figure 25. Undervoltage is under control, and no overvoltage occurs when it recovers. The next step is to build a prototype and verify the loop response on a test bench using a network analyzer.

This field test is critical and cannot be skipped. This experiment lets you know if the assumptions made when modeling the converter and its compensation circuit are confirmed by actual board measurements. By feeding the test results back to the model, you can perform worst-case analysis on a computer and be confident that it matches reality.

in conclusion

This article details various methods for designing the compensation section of a switching converter. The paper first introduces the power stage control-to-output transfer function, which can be obtained in different ways: using an averaged model simulation; deriving small-signal equations or using a piecewise linear engine such as SIMPLIS. After the analog mask used matches the phase and gain margins you set, your results must be compared to those obtained with the prototype on the test bench. Then, parametric sweep analysis, Monte Carlo analysis, and worst-case analysis are performed on the validated model to ensure a quality and durable product is brought to market.

The Links:   LQ10D41 CM400DY-12NF

Exit mobile version